CSC/EEE120 Digital Design Fundamentals
Fall 2025 (8/26 - 12/19) (Active)
(Optional) Text Book: Floyd, Digital Fundamentals w/VHDL (w/CD), ISBN #9780130995278
Embedded Files
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Hybrid Class ( CSC120 #20193/EEE120 #21099)
Hybrid Class ( CSC120 #20193/EEE120 #21099)
Note: Canvas CSC120/Class#20193 covers online materials for EEE120/Class #21099
Class meets every Tuesday 10:00am - 12:45pm @ T1-112 + Online assignments
Class meets every Tuesday 10:00am - 12:45pm @ T1-112 + Online assignments
Office Hour: Reserve 15 minutes after class
Office Hour: Reserve 15 minutes after class
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(for In-Person Class only)
(for In-Person Class only)
If you don't feel well:
If you don't feel well:
1. Email me that you don't feel well (you don't need to provide me any medical info), stay home and do assignments Online
1. Email me that you don't feel well (you don't need to provide me any medical info), stay home and do assignments Online
2. Get well. There is no rush, only go back to class when you are well.
2. Get well. There is no rush, only go back to class when you are well.
Note: strict Online Assignments policy:
Note: strict Online Assignments policy:
If students don't submit assignments in 14 days, they will be dropped from the course
If students don't submit assignments in 14 days, they will be dropped from the course
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Assignment #1 / Sign in Canvas / Do Syllabus Quiz
Assignment #1 / Sign in Canvas / Do Syllabus Quiz
post 8/26, due in class 8/26
post 8/26, due in class 8/26
(It is SO SIMPLE, just DO IT!)
(It is SO SIMPLE, just DO IT!)
(Note: If you don't show up for the first class, you will be dropped as "NO SHOW")
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Resource for Assignment #2
Resource for Assignment #2
(Optional: Form a Study Group of 2). Read the power point, practice the problems presented in the power point, make sure you understand the concept
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(post 8/26) (due 9/5 11:59 pm )
(post 8/26) (due 9/5 11:59 pm )
late: 9/6 12:01am - 9/7 11:59pm
late: 9/6 12:01am - 9/7 11:59pm
Game Over: after 9/7 11:59pm: 0 point
Game Over: after 9/7 11:59pm: 0 point
Solutions /Assignment 2 (link/g)( post after due date)
Solutions /Assignment 2 (link/g)( post after due date)
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Common Q & A
Q1. does all assignments get sent to you by email, not on Canvas ?
A1. I use Canvas for a few purposes:
1. At the beginning of the class, I use it as an intro for the class, and set up a link to this web page.
2. Syllabus quiz
3. Announcement when new assignments are posted
4. Grade Book (grades are posted 1 week after due date)
After that, our class web page takes over for Assignments details, Resources, etc.
Sending assignments by email is faster, especially when Canvas is down (there is no middleman).
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Digital Lab Kits
Digital Lab Kits
Digital Lab Kits will be provided to you in class, you use it to do lab in class and at home.
Digital Lab Kits will be provided to you in class, you use it to do lab in class and at home.
The unit is assigned to you until we finish the final lab, then you return it to me in the class room.
The unit is assigned to you until we finish the final lab, then you return it to me in the class room.
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Resources for Assignment #3
Resources for Assignment #3
Basic Logic Gates: NOT, And, Or
Basic Logic Gates: NOT, And, Or
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(Digital Lab Kit will be provided in the class room, you get to keep the Lab Kit until the last lab assignment of this class)
(Digital Lab Kit will be provided in the class room, you get to keep the Lab Kit until the last lab assignment of this class)
(post 9/2) (due 9/12 11:59 pm )
(post 9/2) (due 9/12 11:59 pm )
late:9/13 12:01am - 9/14 11:59pm
late:9/13 12:01am - 9/14 11:59pm
Game Over after 9/14 11:59pm: 0 point
Game Over after 9/14 11:59pm: 0 point
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Common Q &A
Common Q &A
Q0. I am not able to save or downloads Assignment #2 files @Docs.Google. Could you send me the Assignment #2 file.
A0. Once you open up the file, do:
File/Download/Microsoft PowerPoint(.pptx)/ Filename: assign-02-ecer103-YOURfirstName-Lastname.pptx
then edit your file in the downloaded folder.
email to Ui.luu@gccaz.edu attaching your edited PowerPoint
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Q1.I have spent quite some time troubleshooting it and got it to work perfectly, so I will attach my part of the assignment and turn it in.
Just curious, what did you do to make it work? Correct wiring error?
A1. For me, the problem was that I didn't plug the parts in all the way so it might be that caused the trouble with it. So I just unplugged everything and plugged it back in and make sure they are all the way in their spot. It works!
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Additional Practices (Optional: 0 point / Report NOT required)
Additional Practices (Optional: 0 point / Report NOT required)
(Optional) Build & Test AND Logic
(Optional) Build & Test AND Logic
1. draw schematics with pin assignments,
2. build circuit based on schematics
3. Take a photo of circuit board
4. Connect to the "Power & I/O" test board. Run 4 test cases, take 4 photos
5. Put test data next to the truth table.
5. Put in the PowerPoint, save filename as 120-bonus-assign-03-FirstName-LastName (for your own record, NO report is required)
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(Optional) Build & Test OR Logic
(Optional) Build & Test OR Logic
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Review the following microPointer: Example of Combination Logic below, then do Assignment #4
Review the following microPointer: Example of Combination Logic below, then do Assignment #4
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(Note: This assignment is to practice creating a truth table based on logic diagram, it does NOT require building or testing any circuit. )
(Note: This assignment is to practice creating a truth table based on logic diagram, it does NOT require building or testing any circuit. )
(post 9/9) (due 9/19)
(post 9/9) (due 9/19)
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Solution / Assignment #4(g-link)
Solution / Assignment #4(g-link)
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Simple Security System(link)
(post 9/16) (due 9/26)
(post 9/16) (due 9/26)
(Note: If you are new in building circuits, it is beneficial to compare notes with your teammate, you still have to build your own circuit & take your own pictures)
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Warnings
Warnings
If you submit my original PowerPoint or "Guided Tour" as your report, it is Plagiarism:
The first Plagiarism will have 0 point & written warning
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Building Circuit / Secret of Success :
Building Circuit / Secret of Success :
1. Follow Logic Diagram closely
1. Follow Logic Diagram closely
2. Each wire has 2 connections, Triple check each connection before adding the next wire.
2. Each wire has 2 connections, Triple check each connection before adding the next wire.
3. "Despacito" / Go Slow : The slower you go, the faster you will get your circuit working.
3. "Despacito" / Go Slow : The slower you go, the faster you will get your circuit working.
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(post 9/23) (due 10/3)
(post 9/23) (due 10/3)
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Design a Lethal Security System using SOP Method
Design a Lethal Security System using SOP Method
(Note: The video was made for Assignment #6 Fall2020 Class, It mentioned Build & Test circuits. Last semester, majority of beginners can NOT make the circuit to work, because it's a little more complicated than the newbies can handle, and they cried! So, I decide to make the Build & Test part 100% optional, only do it because you have time and want to challenge your building & troubleshooting skill)
(Note: The video was made for Assignment #6 Fall2020 Class, It mentioned Build & Test circuits. Last semester, majority of beginners can NOT make the circuit to work, because it's a little more complicated than the newbies can handle, and they cried! So, I decide to make the Build & Test part 100% optional, only do it because you have time and want to challenge your building & troubleshooting skill)
(This is for practice only, to prepare for Assignment #7, No Report required)
(This is for practice only, to prepare for Assignment #7, No Report required)
Note: for SOP Design Practice only, Building circuits is Not required
Note: for SOP Design Practice only, Building circuits is Not required
(Optional) (No Report required) Guided Tour Build & Test SOP Design / Lethal Security System (Courtesy from Angelica/ Fall2020)
(Optional) (No Report required) Guided Tour Build & Test SOP Design / Lethal Security System (Courtesy from Angelica/ Fall2020)
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(post 9/30) (due 10/10)
(post 9/30) (due 10/10)
Assignment #7 / Solution(link)
Assignment #7 / Solution(link)
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Common Q & A
Common Q & A
Q0. After reviewing the feedback, I know what is missing, can I resubmit for partial credits?
Q0. After reviewing the feedback, I know what is missing, can I resubmit for partial credits?
A0. No. Each assignment is treated like a test, follow instructions closely and give it your best shot; I only grade it once.
A0. No. Each assignment is treated like a test, follow instructions closely and give it your best shot; I only grade it once.
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Q1. Why is b + b' = 1 ?
Q1. Why is b + b' = 1 ?
A1. Consider 2 cases:
A1. Consider 2 cases:
case 0: b=0 then b'=1: 0 + 1 = 1
case 0: b=0 then b'=1: 0 + 1 = 1
case 1: b=1 then b'=0: 1 + 0 = 1
case 1: b=1 then b'=0: 1 + 0 = 1
Boolean Algebra Power Point at the top of this page covers this info + other worthy items to review
Boolean Algebra Power Point at the top of this page covers this info + other worthy items to review
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Q2. Can you walk us through an example of simplifying a Design Equation using Boolean Algebra?
Q2. Can you walk us through an example of simplifying a Design Equation using Boolean Algebra?
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(post 10/7) (due 10/17)
(post 10/7) (due 10/17)
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(Optional) Practice #2 / Draw Logic Diagram/ Build & Test Boolean Special (NO report required)
(Optional) Practice #2 / Draw Logic Diagram/ Build & Test Boolean Special (NO report required)
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The PowerPoint above covers rules of grouping for all combinations
The PowerPoint above covers rules of grouping for all combinations
(post 10/14) (due 10/24)
(post 10/14) (due 10/24)
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(additional practice / No Report required) Simplify Assignment #9 using Boolean Algebra
(additional practice / No Report required) Simplify Assignment #9 using Boolean Algebra
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(post 10/21) (due 10/31)
(post 10/21) (due 10/31)
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Assignment #11-Part 1 / Design Challenge / 4-variable Karnaugh Map (link)
Assignment #11-Part 1 / Design Challenge / 4-variable Karnaugh Map (link)
( practice in class, No report required)
( practice in class, No report required)
(post 10/28) (due 11/7)
(post 10/28) (due 11/7)
Solution for Assignment #11 (general) (link)( Post after due date)
Solution for Assignment #11 (general) (link)( Post after due date)
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Study Guide for Assignment #11
Study Guide for Assignment #11
Review:
Review:
Assignment #10 / 4-variable Karnaugh Map
Assignment #10 / 4-variable Karnaugh Map
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State Machine Design using D Flip Flop
State Machine Design using D Flip Flop
Learn by doing: Practice State Machine Design using D Flip Flop-Template (Download this template to your local drive, then add your solutions)
Learn by doing: Practice State Machine Design using D Flip Flop-Template (Download this template to your local drive, then add your solutions)
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(post 11/4) (due 11/14)
(post 11/4) (due 11/14)
(Note: for this assignment, you draw the Logic Diagram based on a given Design Equation, Building Circuit is NOT required)
(Note: for this assignment, you draw the Logic Diagram based on a given Design Equation, Building Circuit is NOT required)
Solution for Assignment #12
Solution for Assignment #12
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Return Digital Lab Kit (10 points)
Return Digital Lab Kit (10 points)
Assignment #12 , #13 & #14 does NOT require Building circuit, please return your digital Lab Kit
Assignment #12 , #13 & #14 does NOT require Building circuit, please return your digital Lab Kit
(Note: make sure to put in the box an index card with your name & student ID to get proper return credit)
(Note: make sure to put in the box an index card with your name & student ID to get proper return credit)
Return Location: our class room
Return Location: our class room
Dates & time: Tuesday in class:
Dates & time: Tuesday in class:
(due 11/4, 11/11, 11/18. 11/25)
(due 11/4, 11/11, 11/18. 11/25)
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Design State Machine using JK Flip Flop
Design State Machine using JK Flip Flop
Learn by doing (NO report required): Assignment-2-StateMachineJK-Template (Download the template to your local drive, then add your solutions)
Learn by doing (NO report required): Assignment-2-StateMachineJK-Template (Download the template to your local drive, then add your solutions)
- Follow the Assignment-2 template, follow illustrations then fill in the blanks.
- Compare your answer with the "Spoiler Sample Solution"; if your original answer is NOT correct, have team discussion to figure out the process to get the correct answer.
Spoiler Alert / Sample Solution:
Spoiler Alert / Sample Solution:
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Common Q&A
Common Q&A
Q1. When I work on the state/transition/excitation/output table, I can NOT get the correct output for row#2. Please illustrate.
Q1. When I work on the state/transition/excitation/output table, I can NOT get the correct output for row#2. Please illustrate.
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(post 11/18) (due 11/28)
(post 11/18) (due 11/28)
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Resource / Study Guide to prepare for Assignment #14
Resource / Study Guide to prepare for Assignment #14
0.0 For Karnaugh map grouping, review: Karnaugh Map Power Point
Note: Rule to cover "1" & "x": You have to cover 1, you don't have to cover "x", but if "x" can make your group of 1 bigger, you include it.
0.1 For Design equations, review:
Intro Video (12:47) for Assignment #9
0.2 Review the following for Outputs:
Common Q&A
Q1. When I work on the state/transition/excitation/output table, I can NOT get the correct output for row#2. Please illustrate.
A1. (Click for short video) (post; planned 4/15, actual 4/14)
1. Review:
(short videos): Pointers & Illustrations for Design Process using JK Flip Flop
2. Review
Learn by doing (NO report required): Assignment-2-StateMachineJK-Template
3. Review / Compare notes with Sample solution:
Sample solution for JK State Machine Design
4. Review Special case:
Example / Create Design Equation for Special Case
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(post 11/25) (due 12/5)
(post 11/25) (due 12/5)
Solution for Assignment #14(post after due date)
Solution for Assignment #14(post after due date)
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12/2/2025
12/2/2025
State Machine Review
Review State machine Design: D vs JK Flip Flop
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Last Day of Class:12/9
Last Day of Class:12/9
Course Evaluation
Section number ( CSC120 #20193/EEE120 #21099)
Section number ( CSC120 #20193/EEE120 #21099)
Link: https://forms.gle/7ukL3CM7KAqafUVP6
Class Summary_
(post 12/2) (due 12/12)
(post 12/2) (due 12/12)
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12/15: Final Grade will be posted on Canvas Grade Book
12/15: Final Grade will be posted on Canvas Grade Book
12/23: Official Final Grade posted in SIS "Student Center")
12/23: Official Final Grade posted in SIS "Student Center")
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Embedded Control / DeLorean
Embedded Control / DeLorean
(Featuring: Thea / CSC120 / Fall2019)
Jumbo Jet Engine Control
Jumbo Jet Engine Control
(US Patent 6,587,199 B1)
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